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Senior CPU Microarchitecture & Logic Design Engineer, Memory Execution
​Location: Portland, OR or Austin, TX
 
Type: Full-Time
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Job Description
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We are seeking a talented Senior CPU Design Engineer to join our team. In this role, you will be responsible for designing and implementing high-performance CPU subsystems, with a focus on achieving optimal power, performance, and area (PPA). You will work closely with cross-functional teams to develop innovative solutions, refine microarchitecture, and validate designs. This is an opportunity to work on cutting-edge projects and make a significant impact on the future of CPU technology in a collaborative and fast-paced environment.

 
Responsibilities

  • Define, develop, and refine microarchitecture specifications for complex CPU subsystems.

  • Design and implement RTL to achieve targeted power, performance, area, and timing goals.

  • Collaborate closely with the verification team to establish effective validation strategies for new designs. Support test bench development and assist validation engineers in testing and debugging core and subsystem-level RTL in simulation, prototyping platforms, and silicon.

  • Work with cross-functional engineering teams to implement RTL in physical design and ensure that the design meets timing, area, reliability, testability, and power requirements.

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Qualifications & Skills:​

  • Minimum Qualifications:​​

    • A Bachelor’s degree in Electrical/Computer Engineering, Computer Science, or a related field with 4+ years of experience; OR a Master’s degree with 3+ years of experience; OR a PhD with 1+ years of experience.

    • In-depth knowledge of microprocessor architecture and microarchitecture, including expertise in high-performance and low-power trade-offs.

    • Proficiency in applying trade-off and optimization techniques between performance, power, and area (PPA).

    • Experience with SystemVerilog development.

    • Familiarity with high-frequency design considerations, including timing, power, and multiple clock domains.

    • Hands-on experience with front-end tools such as Verilog simulators, waveform viewers, linting tools, logic synthesis, and place-and-route.

    • Programming skills in C/C++ and Python.

    • Strong problem-solving skills and an analytical mindset.

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  • Preferred Qualifications:​

    • Experience with coherency protocols, memory consistency, L1/L2 caches, and TLBs design.

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What We Offer:

  • Competitive salary and benefits package.

  • Opportunities for professional growth in an innovative startup environment.

  • Collaboration with talented engineers passionate about cutting-edge CPU technologies.

  • A flexible and inclusive work culture based in Portland, OR or Austin, TX.

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