Why We Chose RISC-V to win

Why We Chose RISC-V to Win

Dr. Debbie Marr, CEO | AheadComputing

When we founded AheadComputing, the first question every investor, engineer, and potential hire asked us was the same: Why RISC-V? It’s a fair question. The computing industry has two deeply entrenched ecosystems in x86 and ARM, each backed by decades of software investment, enormous incumbents, and massive installed bases. Betting against incumbents is always a risk. But as anyone who has watched this industry long enough knows, the most transformative moments in computing history have never come from the incumbents themselves. They have come from the edges: from new architectures, new economic models, and new communities of builders unencumbered by the weight of legacy.

At AheadComputing, we did not choose RISC-V despite the disruption it represents. We chose it because of it.

Performance Is the Engine of Ecosystem Change

Let me start with what I believe is the most underappreciated truth in computing: performance moves markets. This is not merely a slogan. It is the mechanism by which new architectures break through. And it is a pattern this industry has lived through before, twice.

In the 1990s, SPARC, DEC Alpha, and Power were the performance leaders. The incumbent workstation and data center vendors (Sun, DEC, IBM) had deep software ecosystems and loyal customer bases. And yet x86 won, decisively, because Intel and AMD delivered better performance per dollar at a pace that the RISC vendors could not match. The software ecosystems followed the silicon. They always do.

The same dynamic played out again in the 2010s. When ARM first entered the data center with Amazon’s Graviton in 2018, the pundits were skeptical. “The software ecosystem isn’t there,” they said. “Enterprises won’t retool.” They were wrong, not because the software problem disappeared, but because performance and economics were compelling enough to motivate the work. Every major cloud provider followed. Developers follow performance. Software ecosystems follow developers. The virtuous cycle builds from there.

We are now at the beginning of a third such transition. RISC-V is entering a similar inflection point today, but with structural advantages that neither x86 nor ARM ever had. Because RISC-V is a clean, purpose-built architecture unburdened by legacy constraints, it gives processor designers the freedom to optimize end-to-end without compromise. That freedom translates directly into performance headroom that proprietary architectures simply cannot match. At AheadComputing, we believe our performance leadership in RISC-V can be the catalyst that accelerates ecosystem adoption, exactly as performance has done in every prior architectural transition.

The Numbers Tell the Story

When we made our architectural decision, the RISC-V community was already much larger than most people realized. Today, RISC-V International counts over 4,600 member organizations, a number that has grown by a factor of nearly 20 since 2019. In 2024 alone, more than one billion RISC-V cores shipped. Analysts project the installed base will grow from roughly two billion chips today to twenty billion by 2031.

More telling than the aggregate numbers is who is building with RISC-V. As of 2023, more than 50% of semiconductor startups had incorporated RISC-V into their product roadmaps. This is not a hobbyist trend. Consider NVIDIA: the company already ships between 10 and 40 RISC-V cores in every GPU it sells, embedded in the microcontrollers that handle power management, security, video codecs, and chip-to-chip interconnects. By RISC-V International’s own estimate, NVIDIA shipped over one billion RISC-V cores in 2024 alone. And at the 2025 RISC-V Summit, NVIDIA went further, announcing that CUDA, the software platform that runs virtually all serious AI and HPC workloads, will be made compatible with RISC-V as a host processor architecture, joining x86 and ARM. When the company whose GPU software stack defines the AI industry signals that RISC-V belongs in that stack, the ecosystem signal could not be clearer. Tenstorrent, one of the most closely watched AI chip companies in the world, built its Tensix architecture on RISC-V’s open foundation. SiFive’s second-generation Intelligence family is targeting 64 TFLOPS of FP8 performance for AI workloads. These are not hobbyist experiments. They are strategic commitments from the companies shaping the future of compute.

This is not an emerging ecosystem. This is a rapidly maturing one, and we are in it at exactly the right moment.

What Makes RISC-V Different: No ISA Tax, No Ceiling

To understand why RISC-V wins in the long run, you have to understand what holds the alternatives back.

x86 carries forty years of architectural debt. Every generation of Intel and AMD processors must maintain binary compatibility with software written decades ago, a constraint that forces enormous engineering complexity into every design. That complexity means longer development cycles, higher costs, more security surface area, and ultimately a ceiling on how fast the architecture can evolve. The x86 ecosystem will not collapse overnight; its legacy software moat is real and deep. But in a world defined by rapid AI-driven compute demands, slow evolution is a slow death.

ARM presents a different kind of constraint. The architecture itself is modern and capable, and the ecosystem ARM has built across mobile, data center, and embedded markets is genuinely impressive. But ARM Holdings controls the licensing and pricing of that entire ecosystem, and the company has been signaling its intent to compete with its own customers. When a single entity sets the rules and is also the most powerful player on the field, it creates a tax on innovation. We believe this dynamic will push a growing number of companies to ask themselves whether RISC-V is a better long-term bet, and increasingly, the answer will be yes.

RISC-V is structurally different. There is no ISA tax. There is no single entity that can change the pricing, restrict the features, or decide to compete with its own partners. The architecture is governed by RISC-V International, a nonprofit whose charter is to steward an open standard for the benefit of the entire ecosystem. Innovation is unrestricted. That structure does not just reduce cost; it changes the incentive landscape entirely, attracting a far broader and more diverse community of contributors than any proprietary architecture can.

The Migration Problem Is More Solvable Than It Looks

The most common objection to RISC-V in general-purpose computing is the software ecosystem gap. “The legacy software stacks are too deeply tied to x86 and ARM,” the argument goes. “Nobody will pay to rewrite them.” I have heard this argument before. I heard it in the 1990s and early 2000s, when the data center was consolidating from SPARC and PowerPC onto x86. The incumbents (Sun, IBM, HP) argued that their software ecosystems were too deep, too enterprise-critical, too entangled to move. And yet x86 won, decisively, because performance per dollar was simply too compelling to ignore. More recently, I heard the same objection in the early days of the ARM data center transition. Amazon’s Graviton proved the skeptics wrong, and every major cloud provider followed. And it is less true today than it has ever been.

There are three reasons why RISC-V migration is more tractable than conventional wisdom suggests.

First, the x86-to-ARM transition already happened. The substantial porting work that cloud providers, enterprise software vendors, and OS maintainers did to support ARM means that much of the software that matters is already off the deepest x86 legacy stack. Newly-ported ARM code is far easier to move to RISC-V than entrenched x86 code would be.

Second, binary translation has proven itself at scale. Apple’s Rosetta 2 allowed millions of users to run x86 applications on Apple Silicon without any developer intervention, with performance that was often better than running natively on the old hardware. Microsoft’s Prism does the same for Windows on ARM. These are not niche research projects; they are production systems running at consumer scale. The same techniques will ease the RISC-V transition.

Third, and most importantly: AI is now a participant in this transition in ways that were not possible even five years ago. Google made this concrete in a 2025 research paper, “Instruction Set Migration at Warehouse Scale,” which documented their migration of a multi-billion line codebase from x86 to ARM across nearly 40,000 code commits. Their conclusion was striking: the real challenge in a modern ISA migration is not rewriting the core software stack, but addressing the enormous number of small, often trivial adjustments scattered across millions of lines of code. And AI automated the vast majority of that work. If Google can migrate billions of lines of code from x86 to ARM with AI assistance, the path from ARM to RISC-V becomes far more tractable than the conventional wisdom suggests. The economics of ecosystem migration have changed fundamentally.

Why We Are the Right Team at the Right Moment

We did not choose RISC-V casually. Our founding team brings over a century of combined experience in advanced processor development, and we have spent a significant part of our careers building the world’s highest-performing x86 CPUs. That background matters enormously for RISC-V adoption.

Our goal is not merely to match x86 or ARM. It is to beat them. AheadComputing is building RISC-V cores that deliver higher per-core performance than the best products either Intel, AMD, or ARM can put on the market. That is the bar we have set for ourselves, and it is the right bar. A RISC-V core that is merely competitive gives the market a reason to stay with the familiar. A RISC-V core that is definitively faster gives the market a reason to move.

Per-core performance has been the neglected dimension of the AI computing era. The industry has made extraordinary investments in data-parallel AI accelerators, and those investments have paid off handsomely. But the equally important question of general-purpose, single-thread performance, the kind of performance that determines how fast a CPU can handle the orchestration, inference serving, agentic workloads, and latency-sensitive tasks that define modern AI infrastructure, has been largely overlooked. That is the gap AheadComputing was built to close.

The Long Arc

I have spent my career watching architectural transitions unfold. This industry has been here before. In the 1990s, SPARC, DEC Alpha, and PowerPC gave way to x86, not because anyone planned it, but because performance per dollar made the outcome inevitable. In the 2010s, ARM displaced x86 in mobile and then began its march into the data center. Each transition looked impossible to those who benefited from the incumbent architecture, and each looked inevitable in retrospect. The pattern is consistent: superior economics and performance win, legacy software ecosystems adapt, and the new architecture becomes the new default. We are at the beginning of that cycle for the third time.

RISC-V is on that same arc. The microcontroller market has already shifted: ARM has conceded that segment, and MIPS has transitioned its product line to RISC-V entirely. The automotive and AI markets are following. Data center and client computing are on the horizon. The question is not whether RISC-V will become the dominant computing architecture. The question is who will lead it.

We founded AheadComputing to make sure the answer includes us.

‍

‍