Careers@AheadComputing
Everyone deserves a better computer, and you can be a big part of making it happen. At AheadComputing, we are building a team focused on a single product line: compelling RISC-V CPU core IP. Our offices are in Portland, Oregon, but we are flexible on remote work arrangements. Please start a conversation with us at careers@aheadcomputing.com to discuss how you and AheadComputing can best work together.
Roles
Senior Design Verification Engineer
​Responsibilities
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You will create and utilize tools to identify and root cause digital logic bugs in an advanced CPU design
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You will have a key role in developing methodologies to accelerate correct-by-construction design and verification
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You will be a steward of digital design collateral by using standards-based tools wherever appropriate and writing new standards-based tools when business requirements demand
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You will drive convergence towards a fully verified soft IP
Qualifications & Skills
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Advanced degree in Computer Engineering, Computer Science, or a related area​
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6+ years of pre-silicon logic design verification experience working on microprocessors
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Experience working with SystemVerilog and Python
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Expert problem solving skills​
Senior CPU Architect
Responsibilities
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You will innovate and define features to target power, performance, area, and timing goals
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You will develop and refine microarchitecture, and write high-level architecture specification
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You will write RTL of complex IP subsystems
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You will explore high performance strategies and validate that the RTL design meets targeted performance
Qualifications and Skills
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Thorough knowledge of microprocessor architecture and microarchitecture including high performance and low power trade-offs
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Thorough knowledge of performance model development
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Verilog/System Verilog development experience or desire to learn and quickly ramp on RTL design
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Experience using an interpretive language such as Perl or Python
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Expert problem solving skills
Senior CPU Microarchitecture & Logic Design Engineer
​Reponsibilities
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You will develop and refine microarchitecture, write design specification, and deliver and maintain RTL of complex IP subsystems to target power, performance, area, and timing goals
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You will support test bench development and work with validation engineers to effectively test and debug core/subsystem-level RTL in simulation, prototyping platforms and silicon
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You will explore high performance strategies and validate that the RTL design meets targeted performance
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You will work with multi-functional engineering team to physically realize RTL using high performance process technologies and validate physical design on the aspects of timing, area, reliability, testability and power
Qualifications & Skills
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Thorough knowledge of microprocessor architecture and microarchitecture including high performance and low power trade-offs
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SystemVerilog development experience
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Experience with high frequency design considerations (timing, power, multiple clock domains, etc.)
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Experience with typical front-end tools including: Verilog simulators, waveform viewers, and linting tools, as well as logic synthesis and place and route
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Experience in C/C++ & Python programming
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Expert problem solving skills