We are seeking an experienced Senior System Architect to define and drive the architecture of advanced silicon systems. This role focuses on system-level design, IP integration, and architectural specifications, enabling next-generation heterogeneous computing solutions on advanced process technologies.
We're seeking a DFT Engineer to join our CPU design team, focusing on Scan insertion and DFT infrastructure for complex, high-performance CPU cores. You'll be involved from architecture through silicon bring-up, contributing to world-class chip quality and manufacturability.
We are seeking an experienced Senior Formal Verification Engineer to join our team. In this role, you will leverage advanced formal verification techniques to ensure the correctness and performance of high-end RISC-V cores. You will collaborate closely with architects and RTL engineers, employing cutting-edge formal tools and methodologies to build innovative verification solutions. This position offers a unique opportunity to shape the development of high-quality CPU designs and optimize the CPU verification process through rigorous formal analysis and bug detection methods.
We are seeking a talented Senior CPU Design Engineer to join our team. In this role, you will be responsible for designing and implementing high-performance CPU subsystems, with a focus on achieving optimal power, performance, and area (PPA). You will work closely with cross-functional teams to develop innovative solutions, refine microarchitecture, and validate designs. This is an opportunity to work on cutting-edge projects and make a significant impact on the future of CPU technology in a collaborative and fast-paced environment.
We are seeking a Senior CPU Design Engineer with expertise in execution unit design, including Integer ALUs, floating point units, and SIMD/Vector units. In this role, you will be responsible for designing and implementing high-performance execution units in CPU, optimizing for power, performance, and area (PPA). You will work closely with cross-functional teams to refine microarchitecture, develop RTL, and validate designs.
We are seeking a talented Senior Staff CPU Design Engineer to join our team. In this role, you will be responsible for designing and implementing high-performance CPU subsystems, with a focus on achieving optimal power, performance, and area (PPA). You will work closely with cross-functional teams to develop innovative solutions, refine microarchitecture, and validate designs. This is an opportunity to work on cutting-edge projects and make a significant impact on the future of CPU technology in a collaborative and fast-paced environment.
We are seeking a Physical Design Engineer to drive CPU power, performance, and area (PPA) optimization at advanced technology nodes. You will be responsible for physical implementation, collaborating with RTL, and logic design teams to deliver high-performance, and power-efficient processors.
We seek a highly skilled and experienced Senior Information Systems Engineer to join our dynamic CPU Design team. The successful candidate will be critical in developing, optimizing, and maintaining the networks, hardware, and security underpinning our cutting-edge CPU design projects. As a Senior Information Systems Engineer, you will collaborate closely with design, verification, and implementation teams to ensure that our networks, office systems, and HPC infrastructure are efficient, secured, and aligned with the latest industry’s best practices.
We are seeking a Senior CPU Design Engineer to join our team. In this role, you will be responsible for designing and implementing high-performance execution units in CPU, optimizing for power, performance, and area (PPA). You will work closely with cross-functional teams to refine microarchitecture, develop RTL, and validate designs. This is an opportunity to work on challenging projects and play a key role in defining execution unit architecture for next-generation CPU designs.
We are seeking a CPU Design Engineer to join our team. In this role, you will be responsible for designing and implementing high-performance execution units in CPU, optimizing for power, performance, and area (PPA). You will work closely with cross-functional teams to refine microarchitecture, develop RTL, and validate designs. This is an opportunity to work on challenging projects and play a key role in defining execution unit architecture for next-generation CPU designs.
We are seeking a Formal Verification Engineer to join our team. In this role, you will leverage advanced formal verification techniques to ensure the correctness and performance of high-end RISC-V cores. You will collaborate closely with architects and RTL engineers, employing cutting-edge formal tools and methodologies to build innovative verification solutions. This position offers a unique opportunity to shape the development of high-quality CPU designs and optimize the CPU verification process through rigorous formal analysis and bug detection methods.
We are seeking a Physical Design Engineer to drive CPU power, performance, and area (PPA) optimization at advanced technology nodes. You will be responsible for physical implementation, collaborating with RTL, and logic design teams to deliver high-performance, and power-efficient processors.
We're seeking a DFT Engineer to join our CPU design team, focusing on Scan insertion, MBIST, and DFT infrastructure for complex, high-performance CPU cores. You'll be involved from architecture through silicon bring-up, contributing to world-class chip quality and manufacturability.
We are seeking a skilled and motivated Performance and Power (PnP) Modeling Engineer to lead modeling, analysis, and optimization efforts across the full silicon development lifecycle. This role spans architectural modeling, RTL-level analysis, gate-level estimation, and post-silicon correlation. You will build infrastructure, analyze real workloads, identify inefficiencies, and collaborate across hardware and software teams to deliver high-performance and energy-efficient CPU designs.
The industry optimized for throughput, but latency was left behind. We build the high-performance, open-standard RISC-V cores that Agentic AI demands.
