Leonel (Leo) Haro is a seasoned leader in both industry and academia, with over 15 years of experience developing semiconductor pre-silicon verification and logic design talent in Guadalajara, Mexico’s Silicon Valley. Leo has a proven track record in development of world-class cutting-edge semiconductor technologies.
Leo contributed to key advancements in microarchitecture and design for Intel’s memory controllers, particularly for hardware-based DRAM training algorithms across multiple DDRx/LPDDRx generations, high-level SoC flows for Intel Graphics IP, and successfully drove SoCs to PRQ for Intel’s Optane 3DXP technology controllers. In his most recent role, Leo led a highly skilled team of CPU Core verification and designers in Intel’s Advanced Architecture Development Group—marking a significant milestone for the region.
In addition to his industry contributions, Leo is a dedicated educator, currently servingas a part-time professor at ITESO. His teaching portfolio includes Digital Systems, LogicDesign, Computer Architecture, FPGAs, Microcontrollers, and Electronics, shaping thenext generation of engineers.
Leo holds a Master’s in Electronic Design with a minor in Integrated Circuit Design from ITESO and a BS in Electrical Engineering from ITESM.
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